Assemble final executable from all objects.
Section: Implicit and pattern rules
Link binary from generated object list
makefile
makefile
app: $(OBJ)
cc $(OBJ) -o $@Explanation
Combine generated variables with simple final targets.
Learn the surrounding workflow
Compare similar commands or jump into common fixes when this command is part of a bigger troubleshooting path.
Related commands
Same sheet · prioritizing Implicit and pattern rules
Pattern rule with directories
Build objects into a separate output directory.
Clear built-in suffix rules
Reduce surprises by disabling legacy suffix rules.
$* stem in pattern rules
Use the matched stem from the target pattern.